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Trip-T Configuration Interface

The Trip-T configuration space is accessed through a rather peculiar serial interface. This is driven through the TFB firmware as follows:

Write:
  1. Write the data into the TripT Programming interface data register, with the 10bit/8bit flag set correctly.
  2. Write the internal register address, TripT ID, and write instruction to the control register.
  3. Trigger the operation with a write of 0x40 to the trigger register with length=10.
  4. Set the operational mode flag back to operation mode.


Read:
  1. Write the internal register address, TripT ID, and read instruction to the control register.
  2. Trigger the operation with a write of 0x40 to the trigger register with length=10.
  3. Poll the PRG_READBACK register, bit 15 will contain 0 when the operation is complete
  4. The data will then be present in the bottom 8 or 10 bits.
  5. Set the operational mode flag back to operation mode.


Typical values used are as follows:
Register Name Address Value Width
IBP 1 130 8bits
IBBNFoll 2 1208bits
iff 3 08bits
ibpiff1ref 4 1608bits
ibopamp 5 1388bits
ib_t 6 08bits
iffp2 7 428bits
ibcomp 8 878bits
v_ref 9 1708bits
v_th 10 1508bits
gain/pipe length11 4210bits
iwrsel 12 2408bits
luckb 13 428bits

All registers are read and write, but please note that luckb always seems to return 42, no matter what value is written.

The most likely register to be of user interest is v_th (note: this was wrongly identified as v_ref in an earlier version of the documentation) since this controls the discriminator reference voltage. The sense of this register is inverted: a higher DAC code equates to a lower threshold. At some point in the future I will post a set of nominal threshold points. based on the