Type = 0 = daqTest, Major type = 0 = daq Used for run type development; versions undefined Type = 16 = crcTest, Major type = 1 = crc Used for run type development; versions undefined Type = 17 = crcNoise, Major type = 1 = crc Read out basic ADC data to find pedestals and noise Version controls trigger used and data read out Bits 0-1 - 0 use backplane-distributed software trigger (nyi) 1 use BE software trigger 2 use FE broadcast trigger 3 use FE individual triggers Bit 2 - Enable VME block data transfer for ADC data Bits 3 - Enable readout event data for FE and event counter for BE via slow link for every event. Bits 4-7 - Readout event period for VME and BE data via slow link. Readout is done only for one event in every period The default is set to v=5, i.e. BE software trigger and VME block transfer with no slow data readout. Type = 18 = crcBeParameters, Major type = 1 = crc Varies the BE parameters to check their effects on pedestals and noise Version controls which parameter is varied and how long to run for Bits 0-6 - Parameter to be varied: 0 Trigger select, 0-255 in steps of 1 1 Mode, 0-255 in steps of 1 2 Readout control, 0-255 in steps of 1 3 Run control, 0-255 in steps of 1 4 FE data enable, 0-255 in steps of 1 5 DAQ identifier,0-4095 in steps of 1 6 QDR address, 0-3 in steps of 1 7 FE trigger enable, 0-255 in steps of 1 8 J0 enables, 0-3 in steps of 1, bit 0 trg, bit 1 bypass 9 Test value, 0-65535 in steps of 1 10 Test length, 0-65535 in steps of 1 Bit 7 - Enable infinite repeating loop over parameter values Default is v=4, i.e. enabling various FEs for ADC data readout Type = 19 = crcFeParameters, Major type = 1 = crc Varies the BE parameters to check their effects on pedestals and noise Version controls which parameter is varied and how long to run for Bits 0-6 - Parameter to be varied: 0 HOLD width, incremented from defaul by 0,3 in steps of 1 1 HOLD width set differently on FEs 2 ADC start and stop times; set equal, 0-17 in steps of 1 3 ADC delay, 0-31 in steps of 1 4 FrameSyncOut delay, 0-31 in steps of 1 5 QDR (ReadoutSync) data delay, 0-15 in steps of 1 6 VFE control line counters, 0-127 combinations Bit 7 - Enable infinite repeating loop over parameter values Default is v=2, i.e. ADC start and stop time variation Type = 20 = crcIntDac, Major type = 1 = crc Turns on the on-CRC DACs and loops them back internally to the ADCs Version controls the DAC value and which DACs are used Bits 0-5 - 1024*value gives DAC setting, range 0-64512 Bit 6 - Set bot/boardA DAC to zero Bit 7 - Set top/boardB DAC to zero Default is v=32, i.e. both DACs at half scale Type = 21 = crcIntDacScan, Major type = 1 = crc Turns on the on-CRC DACs, loops them back internally and scans the value A configuration with the DACs disabled is taken at the beginning and end The bot/top DACs alternate on/off with the intermediate configurations Version controls the number of steps over the DAC range 0-65535 The number of steps for each of the bot and top DACs is v+1, with the step size therefore being 65536/(v+1) The default value is v=63, i.e. 64 steps for each DAC, each 1024 Type = 22 = crcExtDac, Major type = 1 = crc Turns on the on-CRC DACs and sends them out on the front connector Version controls the DAC value and which DACs are used Bits 0-5 - 1024*value gives DAC setting, range 0-64512 Bit 6 - Set bot/boardA DAC to zero Bit 7 - Set top/boardB DAC to zero Default is v=32, i.e. both DACs at half scale Type = 23 = crcExtDacScan, Major type = 1 = crc Turns on the on-CRC DACs on the front connector and scans their values The bot/top DACs alternate on/off with the intermediate configurations Version controls the number of steps over the DAC range 0-65535 The number of steps for each of the bot and top DACs is v+1, with the step size therefore being 65536/(v+1) The default value is v=63, i.e. 64 steps for each DAC, each 1024 Type = 24 = crcFakeEvent, Major type = 1 = crc Loads data patterns into the FE FIFO memory to play back through the ADC data path. Not yet implemented. Type = 25 = crcModeTest, Major type = 1 = crc Tests the BE memory storage size. The first set of configurations have a large number of small events, the second set have a small number of large events and the third set have a large number of nominal size events. Version controls trigger used and data read out Bits 0-1 - 0 use backplane-distributed software trigger (nyi) 1 use BE software trigger 2 use FE broadcast trigger 3 use FE individual triggers Bit 2 - Enable VME block data transfer for ADC data Bits 3 - Enable readout event data for FE and event counter for BE via slow link for every event. Bits 4-7 - Readout event period for VME and BE data via slow link. Readout is done only for one event in every period The default is set to v=5, i.e. BE software trigger and VME block transfer with no slow data readout. Type = 32 = trgTest, Major type = 2 = trg Used for run type development; versions undefined Type = 33 = trgReadout, Major type = 2 = trg Under development; not yet implemented. Type = 34 = trgParameters, Major type = 2 = trg Under development; not yet implemented. Type = 35 = trgNoise, Major type = 2 = trg Under development; not yet implemented. Type = 36 = trgSpill, Major type = 2 = trg Under development; not yet implemented. Type = 48 = emcTest, Major type = 3 = emc Used for run type development; versions undefined Type = 49 = emcNoise, Major type = 3 = emc Read out pedestals and noise with VFE settings for ECAL Version controls gain used and numbers of events Bit 0 - Enable high gain (x8) for bot 1 - Enable high gain (x8) for top Bits 2-6 - Unused Bit 7 - Reduce acquisition (i.e. refresh) rate to 100 events Default is v=0, i.e. low gain (x1) and full acquisition Type = 50 = emcFeParameters, Major type = 3 = emc Under development; not yet implemented. Type = 51 = emcVfeDac, Major type = 3 = emc Turns on on-CRC DACs and enables one (of six) VFE PCB calibration groups Version controls DACs, calibration groups and DAC value Bits 0-2 - 8192*value gives DAC setting, range 0-57344 Bits 3-5 - Group number 0-5; 6 or 7 does not enable any group Bit 6 - Set bot DAC value to zero Bit 7 - Set top DAC value to zero Default is v=4, i.e. DAC value at half range for group 0 on bot and top Type = 52 = emcVfeDacScan, Major type = 3 = emc Scans both on-CRC DACs for all VFE PCB calibration groups Configurations with the calibration pulse disabled and with it enabled but no groups enabled are done at the beginning and end. In between, configurations loop over the six groups. Version controls the number of steps over the DAC range 0-65535 The number of steps for each of combination is v+1, with the step size therefore being 65536/(v+1) The default value is v=31, i.e. 32 steps for each DAC, each 2048 Type = 53 = emcVfeHoldScan, Major type = 3 = emc Scans HOLD for both on-CRC DACs for all VFE PCB calibration groups Configurations with the calibration pulse disabled and with it enabled but no groups enabled are done at the beginning and end. In between, configurations loop over the six groups. Version controls the number of steps over the HOLD range of 0-256. The number of steps for each combination is v+1, with the step size therefore being 256/(v+1) The default value is v=31, i.e. 32 steps for each combination, each 8 = 50ns Type = 54 = emcTrgTiming, Major type = 3 = emc Triggers with oscillator to give adjustable trigger rates Version controls trigger rate and number of channels Bits 0-4 - 2^value gives oscillator period in units of 25ns Bits 5-6 - Unused Bit 7 - Enable 18 channel readout, otherwise 19 Type = 55 = emcTrgTimingScan, Major type = 3 = emc Scans oscillator period to vary trigger rate. Configurations alternate between 18 and 19 channel raedout and increment the oscillator period by a factor of two after each pair. Version is unused. Type = 56 = emcBeam, Major type = 3 = emc Type = 57 = emcBeamHoldScan, Major type = 3 = emc Type = 58 = emcCosmics, Major type = 3 = emc Type = 59 = emcCosmicsHoldScan, Major type = 3 = emc Type = 64 = ahcTest, Major type = 4 = ahc Used for run type development; versions undefined Type = 65 = ahcDacScan, Major type = 4 = ahc Scans HAB DACs around their nominal values Configuration 0 - nominal Configuration 1 - nominal+1 Configuration 2 - nominal-1 Configuration 3 - nominal+2 Configuration 4 - nominal-2 Configuration 5 - nominal+3, etc Run end resets DACs to nominal value Version number gives maximum difference from nominal, so v=0 does DAC reset only, i.e. 1 configuration, v=1 does 3 configurations, etc. Type = 66 = ahcCmNoise, Major type = 4 = ahc Read out pedestals and noise in calib mode Version controls trigger used and data read out Bits 0-1 - 0 use backplane-distributed software trigger 1 use BE software trigger 2 use FE broadcast trigger 3 use FE individual triggers Bit 2 - Enable VME block data transfer for ADC data Bits 3-7 - Readout event period for VME, FE and BE trigger data via slow link. Readout is done only for one event in every period. A value of zero means never read these data. A typical use would be v=5, i.e. BE software trigger, fast ADC read and no slow links reads. Type = 67 = ahcPmNoise, Major type = 4 = ahc Read out with no signals in physics mode Version is the same as for ahcCmNoise Type = 68 = ahcAnalogOut, Major type = 4 = ahc Inhibit HOLD and allow partial multiplex sequence to see analogue output of single channel. Tcalib, Vcalib and LEDs are enabled. Version controls channel number and mode Bits 0-4 - Channel number Bit 5-6 - Unused Bit 7 - 0 is calib mode, 1 is physics mode Type = 69 = ahcCmAsic, Major type = 4 = ahc Reads out ASIC calibration signals in calib mode Version controls Vcalib value Bits 0-5 - 64*value gives Vcalib DAC value; max is 4032 Bit 6 - Disable Vcalib to board A Bit 7 - Disable Vcalib to board B Type = 70 = ahcCmAsicVcalibScan, Major type = 4 = ahc Scan Vcalib to see ASIC calibration signals in calib mode Configurations alternate Vcalib on boards A and B. Version controls number of steps taken to cover Vcalib DAC range 0-4095. The number of steps for each of board A and B is v+1, with the step size therefore being 4096/(v+1) Type = 71 = ahcCmAsicHoldScan, Major type = 4 = ahc Scan Hold to see ASIC calibration signals in calib mode. Version controls number of steps taken to cover Hold range 0-255. The number of steps is v+1, with the step size therefore being 256/(v+1) Type = 72 = ahcPmAsic, Major type = 4 = ahc Reads out ASIC calibration signals in physics mode Version controls Vcalib value Bits 0-5 - 128*value gives Vcalib DAC value; max is 8064 Bit 6 - Disable Vcalib to board A Bit 7 - Disable Vcalib to board B Type = 73 = ahcPmAsicVcalibScan, Major type = 4 = ahc Scan Vcalib to see ASIC calibration signals in physics mode Configurations alternate Vcalib on boards A and B. Version controls number of steps taken to cover Vcalib DAC range 0-8191. The number of steps for each of board A and B is v+1, with the step size therefore being 8192/(v+1) Type = 74 = ahcPmAsicHoldScan, Major type = 4 = ahc Scan Hold to see ASIC calibration signals in physics mode. Version controls number of steps taken to cover Hold range 0-511. The number of steps is v+1, with the step size therefore being 512/(v+1) Type = 75 = ahcCmLed, Major type = 4 = ahc Reads out LED calibration signals in calib mode Version gives Vcalib DAC value as 256*v; max is 65280 Type = 76 = ahcCmLedVcalibScan, Major type = 4 = ahc Scan Vcalib to see LED calibration signals in calib mode Version controls number of steps taken to cover Vcalib DAC range 0-65535. The number of steps is v+1, with the step size therefore being 65536/(v+1) Type = 77 = ahcCmLedHoldScan, Major type = 4 = ahc Scan Hold to see LED calibration signals in calib mode. Version controls number of steps of size 1 taken above a Hold of 70 so the Hold range is 70 to 70+v inclusive Type = 78 = ahcPmLed, Major type = 4 = ahc Reads out LED calibration signals in physics mode Version gives Vcalib DAC value as 256*v; max is 65280 Type = 79 = ahcPmLedVcalibScan, Major type = 4 = ahc Scan Vcalib to see LED calibration signals in physics mode Version controls number of steps taken to cover Vcalib DAC range 0-65535. The number of steps is v+1, with the step size therefore being 65536/(v+1) Type = 80 = ahcPmLedHoldScan, Major type = 4 = ahc Scan Hold to see LED calibration signals in physics mode. Version controls number of steps of size 2 taken above a Hold of 70 so the Hold range is 70 to 70+2*v inclusive Type = 81 = ahcScintillatorHoldScan, Major type = 4 = ahc Scan the Hold while pulsing the LEDs in the scintillator trigger as well as the detector. The version number is used to select the trigger Version v <16 - Use trigger input v on backplane Type = 82 = ahcBeam, Major type = 4 = ahc Type = 83 = ahcBeamHoldScan, Major type = 4 = ahc Type = 84 = ahcBeamStage, Major type = 4 = ahc Type = 85 = ahcBeamStageScan, Major type = 4 = ahc Type = 86 = ahcCosmics, Major type = 4 = ahc Type = 87 = ahcCosmicsHoldScan, Major type = 4 = ahc All beam and cosmics runs use the version number to control the trigger used during the data taking configuration (every third configuration). Version v <16 - Use trigger input v on backplane v=255 - Use oscillator trigger as test Type = 88 = ahcExpert, Major type = 4 = ahc Type = 96 = dhcTest, Major type = 6 = dhc Used for run type development; versions undefined Type = 97 = dhcNoise, Major type = 6 = dhc Type = 98 = dhcBeam, Major type = 6 = dhc Type = 112 = tcmTest, Major type = 7 = tcm Used for run type development; versions undefined Type = 113 = tcmNoise, Major type = 7 = tcm Basic ADC data readout. Type = 114 = tcmBeam, Major type = 7 = tcm Type = 115 = tcmBeamHoldScan, Major type = 7 = tcm TCMT-only beam runs. Type = 116 = tcmCalLed, Major type = 7 = tcm Type = 117 = tcmPhysLed, Major type = 7 = tcm Type = 118 = tcmCalPedestal, Major type = 7 = tcm Type = 119 = tcmPhysPedestal, Major type = 7 = tcm Calibrations; details unknown. Type = 120 = tcmCosmics, Major type = 7 = tcm TCMT-only cosmics runs. Type = 128 = bmlTest, Major type = 8 = bml Used for run type development; versions undefined Type = 129 = bmlNoise, Major type = 8 = bml Basic readout of beam line components (TDC, etc) only Type = 130 = bmlInternalTest, Major type = 8 = bml Runs LC1176 TDC in internal test mode to generate hit patterns Type = 144 = slowTest, Major type = 9 = slow Used for run type development; versions undefined Type = 145 = slowMonitor, Major type = 9 = slow Type = 160 = beamTest, Major type = 10 = beam Used for run type development; versions undefined Type = 161 = beamNoise, Major type = 10 = beam Type = 162 = beamData, Major type = 10 = beam Type = 163 = beamHoldScan, Major type = 10 = beam Type = 164 = beamStage, Major type = 10 = beam Type = 165 = beamStageScan, Major type = 10 = beam All beam and cosmics runs use the version number to control the trigger used during the data taking configuration (every third configuration) Bits 0-6 - Unused Bit 7 - 0 use real trigger 1 use oscillator trigger Type = 176 = cosmicsTest, Major type = 11 = cosmics Used for run type development; versions undefined Type = 177 = cosmicsNoise, Major type = 11 = cosmics Type = 178 = cosmicsData, Major type = 11 = cosmics Type = 179 = cosmicsHoldScan, Major type = 11 = cosmics All beam and cosmics runs use the version number to control the trigger used during the data taking configuration (every third configuration) v = 0-15 - Use trigger input = v 254 - Use software trigger 255 - Use oscillator trigger