Minutes of CALICE Electronics Phone Meeting, 27/10/04 ===================================================== Present at home: Paul Dauncey Present at Imperial: Osman Zorba Present at Manchester: Dave Mercer Present at RAL: Rob Halsall, Saeed Taghavi Present at UCL: Matt Warren Minutes: Paul Board status: The boards were received at RAL this morning. The manufacturing has taken 35 working days rather than the requested 12 working days. This does not imply a problem which will influence the later assembly of the seven remaining boards. The boards will now be JTAG'ed; most of the time needed for this is in setup. They could be available for collection on Wed 3 Nov if things go well. Firmware status: Dave has not yet succeeded in compiling the BE code. There may be incompatibilities with versions. Saeed recommends ISE 5.2 (6.3 doesn't work) and he uses Advantage 6.2 (although everyone else is using 5.4). He is also using Precision, rather than Spectrum, for synthesis. The issue is whether other people should migrate from Advantage 5.4 to 6.2. Saeed does not recommend this; he has had many timing problems with 6.2. Saeed sent BE V3.45 to Matt yesterday. The main change here is that it uses differential VME<-->BE lines rather than single-ended. It has no known errors for CMS use. Also, it compiles for Saeed under both Advantage 5.4 and 6.2. Matt can try this after deleting the I/O ports as required for our boards. We will need to upgrade the VME firmware to use the differential lines when we use this. This change should be backwards compatible with single-ended versions of the BE code. Osman will upgrade the VME versions on the prototypes today and Matt will send the raw V3.45 (with the I/O ports disabled) to Osman to load. AOB: Matt commented that the latest production of Atlas STI boards had been made significantly thinner and consequently have bowed, giving problems with bad connections. We might want to check our boards for this. All 70 cables are thought to be at RAL; they will need to be taken to Imperial at some point. Osman said Imperial will build a trigger distribution board to fit onto J0. He has ordered the J0 connectors; the minimum order is 16, where only 7 are needed, but the cost is relatively low at 130 pounds plus VAT. There are two resistors missing (i.e. not assembled) per board for the trigger fanout. These could be added by hand if required. We only need one board fixed for now. The assembly instructions can be changed so the remaining seven boards are done correctly. Matt presented a poster at the recent IEEE conference in Rome. The poster is very nice (and large; it is A0 and around 35MBytes) and Matt has made the ppt file is available. Paul has slightly modified the file to change the author list to be "The CALICE-UK Collaboration" and this version is available from http://www.hep.ph.ic.ac.uk/calice/conferences/041016ieee04/poster.ppt Next meeting: Paul will travel to RAL on Wed 3 Nov to collect the two new boards. Until these have been studied, the schedule is somewhat uncertain, so the next meeting will be arranged by email at a later date.