Minutes of CALICE-UK Meeting, UCL, 19/12/01 =========================================== Present: Jon Butterworth, Paul Dauncey, Ian Duerdoth, Steve Hillier, David Miller, Mark Thomson, David Ward, Matthew Warren, Nigel Watson. Minutes: PaulD PPRP letter: We have been told we need to submit a one-page letter to the PPRP for the Jan 28 meeting to alert them to our plans and get us onto the agenda for the Mar 25 meeting. This letter has to contain some estimates of the equipment costs and RAL TD effort required. As usual, this letter should be submitted two weeks before the meeting, i.e. Jan 14, and so the aim is to circulate a first draft by Jan 7. PaulD will produce this draft. This requires us to come up with a firmer cost and effort estimate over the next few weeks. JonB said the TD effort will be as important as the equipment cost so we need to have good figures for both. In addition, we need to indicate the type of engineering effort required; while we could do some of the design in the Universities, we will need RAL TD specifically for both a system-level engineer to take an overview of the whole of the readout system and also for someone to do the multi-layer PCB layout. Note, the RAL TD costs do not come out of the 300 kpounds/year which is at the PPRP's disposal. Birmingham have an engineer, Richard Staley, who would be prepared to look over the ideas and give some comments, as well as a cost and effort estimate. He could also do some FPGA design; it would be very useful for him to do a first estimate of the complexity of the FPGA designs needed in terms of the component cost and design time needed. For the letter, it will be good to err on the high side (~10%) when doing the estimates; at present the prototype cost is guesstimated to be ~50k and the production ~150k, which would be for FY02/03 and FY03/04 respectively. The beamtest date should be kept to the "ready to run by end of 2003" statement in the PRC submission, although it might be worth qualifying this as being in a state of flux. PPRP bid: The main submission to the PPRP will be for the Mar 25 meeting; again, with the two week submission time, this sets a Mar 11 deadline and so the aim is for a first draft at the beginning of March (in time to be circulated before, and discussed at, the Mar 6 LC-UK meeting at UCL, see below). As discussed at the previous meeting, this should have three or four sections on the physics case, CALICE collaboration, UK proposal and tables of costs, effort, milestones, etc. Rough page counts for these are; Physics case ~5 pages CALICE collaboration ~2 pages UK proposal ~10 pages Cost, effort tables ~2 pages ========= Total ~19 pages The physics section will be put together by MarkT and DavidW. This should be based on several different physics channels, to be sure that they cannot all be dismissed as uninteresting or improbable. They should include a highest energy case if possible. They could include some (or all) of the following; H -> WW vs ZZ (relevant only for high mass Higgs) t-tbar productions HHH vs HHZ couplings (relevant for low mass Higgs) SUSY (often contains missing energy and so requires good calorimetry) WW final states (with leptons) Giga-Z (? is there physics which requires good calorimetry?) It would be useful to consult Klaus Desh (?) at DESY on the light Higgs work and Grahame Blair on the SUSY studies. Most of these studies can be obtained from the TDR and references to LC notes within this. NigelW showed a paper by P.Gay evaluating the effect of differing jet resolutions on Z -> HH -> 6 jets, which argues 35% resolution is needed. We need to dig out several such cases to include in our document. A good figure of merit is the equivalent incremental factor of luminosity required to get the same result without good resolution. This section needs to handle the arguments for Si-W carefully. The cost is an obvious problem with this calorimeter, so we should slant the CALICE beamtest work as a way to study how to optimise the cost without compromising the physics; the best solution (i.e. Si-W) should not be rejected on cost grounds before it has been studied. In addition, we need to emphasise that there are technical issues to be solved before such a calorimeter could be built and these will also be tackled by the beamtest. There is some argument to be made for studying how the readout electronics might work in the final system but again, care is required. We cannot project this work as the first stage of a long-term project directly to a LC as this would require us to do a full cost evaluation and would obviously be well over the critical 1 Mpounds dividing line. The second section needs some description of the HCAL side of CALICE and how that fits in. The HCAL actually has the biggest impact on the jet resolution so it is essential that we can argue the case correctly here. Volker Korbel at DESY is the de facto HCAL leader and we need more contact. JonB will contact Steve McGill at Argonne NL as he may be involved in the HCAL also. The other delicate point is the status of the Italian ECAL effort. Paolo Checcia's group is looking at a mixed silicon and scintillating tile option, mainly to reduce the cost, so we need to be ready for questions about this. They are not part of CALICE (and in fact the relations are very strained between the two efforts) so this could prove difficult. PaulD and JonB will produce this section. The rest of the document should detail what we intend to do. PaulD is trying to produce a more detailed specification document (see below) which would be condensed down for this section. It would be good to have a cost comparison with the "cheapest" way of doing the readout (pure VME boards?) so that the extra cost from doing a system conceptually similar to a final TESLA one is known. (It might be that the price is effectively the same.) There may also be a case for re-use, as the readout system may be adaptable for the HCAL also. However, we cannot realistically ask for money to do both. An obvious split would be for both systems to use the same VME and fibre-optic command and data protocol, with different front-end boards, although our front end card might be easily modified to be usable. Until more details of the HCAL are known, this is hard to estimate. PaulD, NigelW and MatthewW will produce this part. The whole document should be made public to the rest of CALICE when it is close to completion. We should not rule out applying for non-UK money if the PPRP does not provide us with the full amount needed. We could potentially go to the DESY PRC and/or the French groups to help out with the production costs. However, this possibility should be kept very confidential. Meetings: There are several meetings in the New Year; Jan 11: CALICE Steering Board at DESY. PaulD cannot attend but JonB may be at DESY and so be able to. PaulD will ask for a phone connection in any case. Feb 20: CALICE collaboration meeting in London. PaulD has been able to get a meeting room and projector booked at IC, so it will happen there. We should try to get some HCAL people to attend also. Mar 6: LC-UK meeting at UCL. This is a good time for us to meet to discuss the status of the PPRP proposal document. We should try to find some time around this meeting, outside of the main sessions. [Note added after meeting: the LC-UK meeting may only be in the afternoon, and David Miller has a room reserved from 10am which we can use.] Mar 25: PPRP meeting at RAL. We will present our proposal and need a good turnout. Also, one person per institute will likely be asked into the closed session. Budget: PaulD has been pressing RAL for the project code. The estimates of Paris costs are roughly 300 for PaulD and JonB, 100 for SteveH, ChrisH, MarkT and DavidW and 400 for IanD, giving a total of 1400 so far. We should make sure these go through and then use the rest for UK travel until it runs out, after which we may need to go back to using University funds. [Note added after meeting: we now have a travel budget, project code FD30607, which has 2.5k for the rest of the FY. I have no information on any budget holder names; assume the most senior person in each institute can sign for now.] Monte Carlo studes: NigelW reported that he had successfully run Mokka but without any graphics. To get visualisation requires setting several environmental variables but it seems that these are compile-time, not run-time variables so the GEANT4 libraries (currently in the system area) need to then be rebuilt. John Allison seems to think this is correct, but is trying to confirm it. Clearly, it would be useful longer term if this "feature" of GEANT4 is changed, but the timescale for that will be long. It runs fine under RedHat V6 but there are problems with V7. Mokka accesses the mySQL database in Lyon directly, so no copies have to be made. No one has access to cvs at Lyon yet as they do not have afs accounts. DavidW has also being running the simulation and made some plots from the ascii files which are output. He finds the number of diodes hit for electron showers gives averages of approximately; 100 diodes for a 2 GeV electron 300 diodes for a 10 GeV electron 700 diodes for a 50 GeV electron The distributions are quite narrow, e.g. the 10 GeV electron did not have any events with more than 400 diodes hit. For the 10 GeV case, which is probably the closest to what we might expect for the beamtest, the shower does leave non-negligable amounts of energy in the last diode layer, so all layers need to be instrumented. DavidW has also installed the BRAHMS GEANT3 simulation at Cambridge. This is more useful for physics studies as Mokka does not simulate non-calorimeter readout and treats the other detectors just as material. Heat flow: IanD has been looking at the heat load for the ECAL if the preamps were put directly onto the diodes. He assumes a cooling pipe can be placed only on the outer surface of the ECAL and the heat must emerge through the ~1mm thick carbon fibre mechanical supports between the aveolae. With 3mW/diode power load from the preamps (running 100%) there is 10W/cm in z of heat to be removed. With an average thermal conductivity of 14W/mK in the carbon fibre and tungsten, then this gives a temperature difference from the inner to the outer surface of 10C with a 1% duty cycle of the power. Even allowing for non-ideal conditions, he thinks up to 50C could be tolerated, which would make putting preamps within the ECAL volume a viable option. Electronics: PaulD described several changes to the conceptual design following the Paris meeting, and other comments. The main things are; o) The Paris meeting concluded that we should digitise at the TESLA bunch crossing speed (~3MHz) but that we should allow for more than one gain to be digitised. o) We need to define the interface between the VFE daughterboard (made by the French groups) and the front end card (made in the UK) so as to be able to work independently. PaulD has sent a first guess at this to the French engineers working on the VFE chip but has not had a reply yet. o) Instead of running FO cables one-to-one between the VME card and the front end cards, the number (and hence cost) of FO cables can be effectively halved by using one downlink cable for every 16 front end boards, as the data rate going down is minimal. This requires a new optical-to-electronic converter board near the front end which splits the FO data into 16 bits and sends each, with the clock, via a short cable. o) The above makes centralising the power distribution to the front end cards quite straightforward. Each could have its power supplied on the same cable as the downlink data, distributed via the new board. This would enable us to have a tree-like grounding structure, as long as there is no ground to the VFE chips or diodes in the mechanical structure. o) Due to uncertainties about who is doing the fast control, the FC system requirements have been reduced to only distributing a clock and a single start-of-bunch-train signal so as to reduce our dependence on the FC. All other timing will be configurable on the front end card. The system now being proposed would still be able to do a multi-sample pulse shape readout, as originally proposed, if only one gain stage is used. The sampling speed would be 12MHz, as opposed to the original 20MHz, but this is probably sufficient. If there is a student looking for a small self-contained project, then a study to see what improvement could be obtained from fitting the pulse shape would be useful. PaulD will release a document detailing the system soon so that we can try to get a more accurate cost and effort estimate from various engineers. [Note added after the meeting: this is now available at http://www.hep.ph.ic.ac.uk/~dauncey/lc/spec.ps and will be updated there as comments come in.]