MAPS Sensor PCB Schematics Review, RAL, 17/05/07 ================================================= Present: Jamie Crooks, Paul Dauncey, Vladimir Rajovic, Marcel Stanitzki, Konstantin Stefanov, Renato Turchetta, Giulio Villani, Nigel Watson, John Wilson Minutes: Paul Schedule: The exact date for the return of the sensor is not yet known but it is expected to be completed by the end of June. It will possibly be at RAL within the first week of July. This is earlier than had been previously assumed. Schematics issues: Vladimir went through the outstanding issues of the PCB design; see talk in sensor PCB web directory. The PCB will now run from 4V, not 3.3V or 5V, and the required 3.3V and 1.8V will be regulated down from this. This means the USB_DAQ board will no longer be able to provide the power as it is not able to supply 4V. Hence, an external power supply will be needed for all uses. The power supply should be rated to around 5A. The estimated power of the sensor is 0.9A for the LVDS drivers and 0.5A for the sensor itself, with the other components being small, totalling 0.1A. This totals 1.5A and so the system will run at 6W, which should not be a problem for cooling, even within the laser box enclosure. For the sensor, the analogue part should take 0.3A and Jamie is confident about this value. The power of the digital parts depends on the switching activity and is much harder to predict; the 0.2A remaining, to make the 0.5A sensor total mentioned above, is a conservative guess. The voltage regulator power values shown in the talk are incorrect as they are based on the previous 5V regulator input voltage. The regulator power is calculated as I x Delta V, so for the digital, this is 1.2A x 0.7V = 0.8W, while for the analogue regulator, it is 0.3A x 0.7V = 0.2W. The signal count was incorrect in the previous discussions. The sensor has 61 digital inputs and the reference DAC serial control needs a further 3 inputs (rather than the 4 stated previously) making a total of 64 inputs. The sensor has 51 outputs, of which 6 (rather than the 5 stated previously) are debug outputs and so will not be transfered to the USB_DAQ board. However, there is 1 output for the DAC control making a total of 46 outputs. Hence, the total number of LVDS signals is 110 and hence the number of pins needed on the connector is 220. The DACs (for both current and voltage references) are all the same 12-bit component for convenience and so have a range of 0-4k. They will power up to their mid-range value of 2k. The current references will have their resistors set so that this gives a value close to the nominal required setting. There is no equivalent adjustment for the voltage references; they will all have a full range of 1.8V for safety (as driving the oxide gates above this voltage will decrease the lifetime of the sensor) and so will all default to 0.9V at power-up. The exception is the threshold voltage which is differential and is set by two independent DACs, so this will default to a differential of 0V. The voltage reference values can be measured easily. The current values are more difficult. It was decided that adding a series resistor was not required. The current can be estimated quite accurately from the voltage across the (precision) resistor in the current sink or source. Hence, no additional circuitry for this will be added. The SPI serial interface to program the DACs allows non-destructive readback of the DAC settings. The test structures will have 6 analogue outputs, with signals down to 10's of mV. Giulio was concerned that these single-ended signals will pick up too much noise from the laser to be usable. Illuminating the test pixels with the laser is an important measurement to do and so it was decided that the 6 outputs should be buffered and sent to a coaxial connector. There are no other analogue outputs from the board. Konstantin suggested a small coaxial connector and he will send details to Vladimir. Jamie will send a suggestion for an appropriate analogue buffer. The connector to the USB_DAQ is a bottleneck to the design of the rest of the system. Unless the connector set on the PCB is the same as on the USB_DAQ end of the cable, then the USB_DAQ will require a converter daughterboard, but work cannot start on this until the connector is defined. It was decided that, for the cosmics and beam test applications, the boards will need to be stacked in a cross or similar, so the main areas with connectors can use higher components. This allows the most flexibility for choosing a sensible connector set. Paul stated that finding a cable and connectors which are around 3k (or less) for 10 sets would be reasonable. People should look into possible connector sets and we should come up with a solution soon. The laser gives a constraint on the PCB size although this might be more flexible if the sensor is positioned optimally within the PCB. Vladimir should see the laser system to understand the constraints better. For the power connector, a lemo (or similar) had been previously suggested. However, it was decided to go with screw posts. For radiation purposes in the beam test, the sensor should be mounted in the middle of a ~4x4cm2 area which is kept clear of semiconductor components, i.e. resistors and capacitors are allowed. There was not a lot of enthusiasm for packaging the sensors. We will have over 100 sensors with the usable epitaxial layer thickness and deep p-well, so there should be sufficient spares, even with breakages. Jamie should send Vladimir the details of the sensor footprint and substrate connection. Jamie also pointed out that the bonding pads are 60mu wide with a 120mu spacing. 60mu is below the standard PCB feature size and so making a PCB for bump-bonding could be expensive. Paul will follow up with Matt Noy on this. Schematics: The schematics were then discussed; see file in the sensor PCB web directory. LVDS receivers: This has the correct number (64) of inputs and there are 10 which are inverted so that the signals have the correct (safe) polarity if the LVDS cable is disconnected. Jamie confirmed these 10 are correct. LVDS transmitters: Again, there are the correct number (46) of outputs. DA converters: The PU pin determines the power-up state, which will be set to the mid-range. Power supply: This includes jumpers on all power lines so that the currents can be measured. Sensor signals: There are pull-ups/downs on several signals. These signals will usually be driven by the LVDS receivers and so the pull-ups/downs will be redundant. However, at power-up, there is a possible time, of order ms, before the LVDS receivers turn on fully, when these signals could be in an undefined state. The pull-ups/downs are to protect the sensor in this condition. Connectors: The actual connector is undefined and so this is a dummy. Sensor power: There is no substrate connection to the sensor. This must be added and must include a jumper so the substrate can be grounded or left floating. Summary of actions: These are: Sensor and substrate footprint: Jamie to define Analogue buffers: Jamie to recommend Coaxial connector: Konstantin to recommend USB_DAQ cable connector: All to investigate PCB feature size: Paul/Matt to investigate Layout review: This will be held at 13.00 on Tue 26 Jun at RAL. [Notes added following a discussion between Jamie and Vladimir after the review: o Substrate connection to the sensor: Using three-way header and a single jumper it could be left floating or connected to either analog or digital ground. o There have been identified four more output signals which should be accesible for probing: DEBUG_HIT600, DEBUG_HIT200, DEBUG_HITOUT1 and DEBUG_HITOUT2. An additional header will be placed on board (or the existing one would get extended). As not sending the signals off board makes for no advantage, the signals will also be available off board through the USB-DAQ. o Jamie would not like the sensor to power up with 0V thresholds. The solution is to rearrange/regroup analog voltage outputs of the DACs in that way so three "-" thresholds power up at 0.9V, whereas all the other analog voltages power up at 1.8V (or 1.65V, see below). If the board space would be problematic, it was agreed that the scaling networks at the voltage outputs of DACs are not necessary except for VRST voltage. Effectively, without the network the maximum voltage at a voltage output is 3.3V/2 = 1.65V, whereas with the network it is 1.8V. o All the scaling networks at the voltage outputs are misdrawn. The first one was misdrawn, and the error propagated because of copy/paste method.]