CALICE MAPS Meeting, RAL, 20/01/06 ================================== Present: Jamie Crooks, Paul Dauncey, Anne-Marie Magnan, Renato Turchetta, Mike Tyndel, Giulio Villani, Nigel Watson Minutes: Paul Minutes of last meeting: No comments. Sensor design: Jamie reported on what he had learned during a visit to the XFAB foundary in Plymouth with Renato. XFAB claim that flip-chip issues are not really relevant for them as the sensor manufacturers but that we should contact the assembly company. Specifically, their process could make pads much smaller than possibly usable for flip-chip bonding. The one issue which is relevant is that the assembly companies sometimes need a total wafer mask and they are able to supply this. Jamie asked that, as details of the XFAB processes were commercially confidential, no references to such details should appear on our web site. His talks at previous meetings have been edited appropriately. Flip-chip bonding: The alternatives for inverting the sensor and connecting directly to the support PCB were considered: o Paul Sellar has a gold stud bonding facility being developed in house at RAL which we might want to look into. o "Standard" indium bump-bonding is now becoming quite reliable albeit still somewhat expensive. o Tab bonding using flexi-kapton cables is being used for other projects. The cables can be made arbitrarily long and so could easily be made to the ~1.5m length needed for the ECAL. The traces can be made at a density of 200mu (100mu track width and 100mu spacing). o Simple conductive glue is a possibility (and would then be very similar to the diode pad option, see below) if the contact pads can be made large enough. There would then be an issue with their capacitance, of course. Some test structures can be added to the first sensor production round wafers to test these various bonding options. For all options, there will be a need for external components, if only decoupling capacitors as ones internal to the sensor cannot be made very large. Mechanical constraints: There was a general discussion on the mechanical issues and working assumptions of the diode pad option. Nigel showed some slides from a talk by Christophe de la Taille (see the usual web page), who is the engineer leading the electronics design for the diode pads. They are investigating conductive glue to connect the pads to the underlying PCB; indeed this is in use in the beam test prototype already constructed. They are also looking at ultra-thin PCBs with no active cooling. They are aiming for an eight-layer PCB of total thickness ~600mu. We need to aim for parameters not too dissimilar from theirs. One issue with their mechanical design is making the substrate ground connection. The wafers are glued onto the PCBs with the substrate away from the PCB. To make contact, a sheet of aluminium foil is glued to the substrate and to a contact strip along the edge of the PCB. This is exposed and so can be easily damaged. Ideally the MAPS would not require a substrate connection, to avoid this issue. It is clear that charge collection should work with a floating substrate and Giulio indeed confirms this in his simulation. However, it may be that the sensor would be much more sensitive to EM pickup noise (although this is not normally the dominant noise source so it would have to increase substantially to be significant). The sensors will also be within a large tungsten structure and this can be grounded, giving good EM shielding. A resistive connection to the substrate could be made through a contact on the top surface. This is really an experimental question and a floating substrate should be tested with the first round of sensors. Sensor simulation: Giulio reported that he has run into problems with the simulation since the decision to change the assumed pixel size to 50 mu. (The change was required to allow a realistic area for the memory within each pixel.) The increase in volume being simulated requires a simulation program larger by a factor of four. He is now occupying 30 of the 36Gbytes of disk space on the ten PC simulation cluster. However, even this is not sufficient and the jobs crash regularly due to disk space limits. The disk is served by a Sun and so cannot be simply increased with cheap disk. A compatible disk array of 12 x 250GByte disks has been costed at 8k. It is not clear who has the money for this; this level of funds is well beyond what we have available from the CALICE budget. In any case, the disk would be used by the microelectronics group as a whole, not just CALICE. It is clear even one of the 250GBytes disks would be sufficient to allow Giulio to continue his work and so it might be possible to make a cheaper purchase initially. Renato will chase this up. While there is no disk, then the 50 mu simulations are stalled. However, there was a list drawn up in the 10/11/05 meeting of simulations to be done for the 25 mu option; from the minutes: "The next steps are to repeat the simulation with circuit n-wells and then try a 10mu epitaxial layer with and without these n-wells. Following this, a simulation with one diode per pixel would be useful. Each simulation run takes around 10 days for the computations (mainly due to the huge volume being simulated)." It would still be worth Giulio working through these as they would still give a good feel for how the sensor will perform. Physics simulation: Nigel has hired an RA, Yoshinari Mikami, who is due to start on Feb 1. He will work ~1/3 of his time on MAPS simulation, so Nigel is hopeful we will make some progress in this area next month. The aim is to start by adapting the LCD detector similation, changing only the silicon detectors to MAPS of the same wafer size. None of the geometry should be changed so as to make the differences as clear as possible. Next meeting: 1pm on Tue 28 Feb, again at RAL R76. As usual, anyone arriving earlier can meet for lunch.