CALICE MAPS Meeting, RAL, 30/03/06 ================================== Present: Paul Dauncey, Anne-Marie Magnan, Yoshi Mikami, Renato Turchetta, Nigel Watson Minutes: Paul Minutes of last meeting: No comments. Oversight Committee: The first meeting of the PPARC Oversight Committee (OsC) for CALICE took place last week, on Fri 24 Mar. It did not go well; the committee had not been given the 2005 proposal until the day of the meeting and started to re-peer review the project, even though this was not within their remit. The comments specifically relevant to the MAPS workpackage were on radiation hardness, the sign-off procedures before fabrication and the definition of the basic and detailed tests. As a general comment, the OsC want to see who are the managers within each workpackage. The MAPS workpackage divides into three main tasks and so suggestions for the managers for these are: Sensor design - Renato Sensor simulation - Mike (He was not present so this must be checked) Physics simulation - Nigel The OsC also generally want a lot more information on the milestones and deliverables. For MAPS, the documentation generated by the reviews will be useful in this respect. Foundry C collaboration: Renato reported on a preliminary discussion he has started with Foundry C about the final sensor production. They do not do high-resistivity sensors and so would only be interested in the MAPS option, not the diode pads. They would be able to vary the epitaxial thickness from their standard values for a large wafer production, but they would need to qualify the process which could mean a large NRE cost for us. This should still be relatively small compared to the total cost, although might be a problem at the prototyping stage. Renato also now has costs for the current project Foundry C, as discussed in the last meeting. They are expensive; for NRE and to make two guaranteed wafers costs $150k, which is more than the 76k pounds we have budgetted for. Additional wafers are then $2-3k each, with a minimum of 48 wafers for a run. This means we probably have to use Foundry A; they have recently merged with another company but their 0.35mu process will continue. They would be interested in taking on some of the design work, in particular for specialised items such as the RAM. Again, the extra costs would be small overall but might be significant for prototyping. Although the present funding level would probably prevent us from submitting any design in their current 0.18mu or smaller image sensor technology, it would be interesting during the three years of the project to talk to them and better understand this issue of process modification and design support, both in technical and financial terms. They have been told about the R&D nature of the project and that it might never lead to any significant wafer production, and certainly will not for several years. The overall ILC timescale is still very uncertain, but the working schedule is based on approval around 2010 followed by a seven year accelerator build period, giving first physics in 2017. It is assumed that the ECAL construction will take around five years and prototyping around two years. Working back from 2017, then this means: Detector TDRs written 2009 Overall approval 2010 ECAL realistic prototyping 2010-2012 ECAL production 2012-2017 Our current funding covers us until Mar 2009, by which time we should be involved the preparations for the TDRs. The numbers of wafers is also not accurately known yet. The TESLA TDR had an ECAL design of 40 layers which, including the endcaps, has 38M channels. The pad size assumed was 1x1cm^2, so this corresponded to 3800m^2 of silicon. The more recent LDC01 detector ECAL design has 30 layers and is slightly smaller and so corresponds to around 2800m^2. Reducing the number of layers further (and hence silicon area and cost) is a major aim of the physics studies. A reasonable estimate would be an area in the range 2000-3000m^2. Assuming each wafer (effectively) gives a 10x10cm^2 sensor, then this area corresponds to between 200k to 300k wafers total. As stated above, these would have to be produced over a five year period, corresponding to 40-60k wafers/year. This corresponds to around 10% of the total foundry production (or is equivalent to Hamamatsu's total production). The two years of prototyping will also need some wafer fabrication. One slab is ~1.5m x 0.3cm and so corresponds to ~0.5m^2, which would be around 100 sensors when populating both sides. Hence, to build several such prototype slabs would need a level of ~1k wafers total in 2010 and 2011. It is highly likely that any production would be sourced from multiple vendors, so the above numbers should be divided by a factor of two (or even three) for discussions with any single vendor. This would mean having to pay for NRE two (or three) times over as the design rules for each foundry differ and so the sensor desgin would have to be adjusted for each. However, the NRE should be a small part of the total cost. Renato will have a phone meeting with Foundry C representatives tomorrow at 3pm; Paul may call in also. Conferences: Paul contacted Marc Weber (RAL/PPD) about the invited talk on CALICE and MAPS at the Siena conference discussed at the last meeting. He would like a senior speaker and it should probably be a talk on sensors rather than physics. This means the most obvious speakers are Renato and Giulio. Renato is not particularly keen to go, so Paul will check with Giulio and forward his name if he wants. This invited talk does not preclude us from submitting other abstracts, e.g. for a more physics focussed talk, later. Renato is giving a talk at the SNIC06 detector development conference at SLAC next week (see link on the usual web page). This is nominally on pixel vertex detectors but he may include a small amount on MAPS for calorimeters. Andy White, a US CALICE collaborator, is also talking on calorimetry. Preliminary Design Review: Renato reviewed the usual arrangements for a PDR within the ISO900 structure used at RAL. The idea is to review the project specifications and sign off an agreed set of documents which allow the actual sensor design to proceed. There is no set structure for the review. They usually take around three hours and can be simply a discussion on the documents prepared beforehand, or can include presentations. It is not required that there should be external reviewers (from outside the project); they can obviously slow down the discussion if they have not read the documents sufficiently but can also give a good perspective, keep us honest and give credibility to the review (e.g. to the OsC). With external reviewers, then presentations would probably be required. There are four documents which will need to be prepared: o Project Specification: This is typically around 2-3 pages and defines the basic sensor performance (although the detail is given in the Technical Specification, see below) and what RAL will be (and will not be) responsible for. It should also include the schedule for the whole project. o Technical Specification: This is a detailed document, typically around 10 pages. It should contain enough detail to determine the technical requirements for the design. This includes (but is not limited to): power, speed, outline floor plan, pixel size, dead area, noise rate, epitaxial thickness, and memory requirements. o Project Management Plan: This gives some details on how we will manage ourselves. o Risk Management Plan: This should set out the risks, probabilities and mitigations for the project. It was thought that a Stakeholder Plan document would not be required for this project. It is clear that we will not be able to determine several of the Technical Specification items accurately before the PDR. The memory requirements will depend on the noise and the physics rate (the latter being a simulation question) and the ILC beam timing is still very uncertain. Optimising the epitaxial thickness is a major study which is ongoing as part of Giulio's sensor simulations. It is relatively difficult to change the specifications after the PDR so for these cases, it will be better to give an upper and/or lower limit rather than guess a value which we might want to change later. The Project Management Plan and Risk Management Plan will be very useful documents to give to the OsC at their next meeting in Sep. Paul thought it would be beneficial to have external reviewers. Renato has used other RAL Microelectronics group leaders for this before, which would be good for the technical details. Renato will find one person for this. However, Paul thought it might also be useful to have a physicist with a systems perspective, such as one of the Atlas or CMS tracker people. The obvious names are Geoff Hall, Phil Allport or Mike Tyndel; Phil is on the OsC and so is probably excluded and Mike is obviously part of the project, so Paul will check with Geoff. The other possibility would be someone from the diode pad side. Here, the problem is that the sensor designers are not really involved with CALICE; the only obvious person is Christophe de la Taille, who is doing the ASIC design rather than the sensors. This was not thought worth pursuing. The only two days for the PDR which most people could attend were Tue 2 May and Fri 5 May. Even then, Nigel will have to call in from SLAC. People should keep both days free for now until we have checked with the people not present and the external reviewers. Renato, with some help from Paul and Jamie, will prepare the documentation and will aim to release it on Fri 28 Apr. Sensor design: Jamie was not able to attend but Renato showed some slides he had prepared (available from the usual web page). This included a first look at the technical specifications needed for the PDR document. (Note some of the specifications which change between the two sensor fabrication rounds are not highlighted.) Jamie is also suggesting having the memory control (but not the memory cells themselves) centralised in a "dead" pixel. This would give one dead pixel for every 2N alive; e.g. for N=8, this would lead to a 6% inefficiency. The significance of this is a physics simulation question. Sensor simulation: Giulio was not present but had reported to Paul that the disk for the simulation farm had not yet been installed, so he had not started the 50mu pixel simulations. Progress on the ongoing 25mu simulations (as per the last meeting) is not known. Renato will check on the status of the disk; they should have been available by now. Physics simulation: Yoshi showed some slides on progress in GEANT4 dividing the silicon wafers longitudinally (see usual web page). He sees 3.04+/-0.10% of the energy in the 15mu sensitive surface layer compared with 15mu/500mu = 3%, which agrees well. The next step is to re-sensitise the bulk silicon so as to be able to reproduce the original MC. Nigel warned about the latest version of Mokka, for which the LCIO SimCalorimeterHit objects only store cell ids, not coordinates, and the SimTackerHit objects do not have the particle momentum. For the PDR, the main input will be the number of physics hits expected in a bunch train. The SiD MAPS simulation can be used if the Mokka work is not advanced enough in time. The main rate of physics hits is expected to be from Bhabhas (a few Hz but large numbers of hits each) and minijets (two-photon quark production, giving ~10GeV jets; they don't produce as many hits but the rate is high, ~200/train, i.e. around a kHz). Anne-Marie has looked into the standard ECAL digi step and will adapt this for MAPS. Anne-Marie, Yoshi and Nigel will try to get together as Cambridge to plan the next steps. (Paul cannot attend.) Next meeting: 1pm on Fri 21 Apr, in R76 as usual.