Trip-T Front End Board Documentation Home
Calibration
The TFB has a programmable charge injection circuit connected to every
TripT input channel. This is a 10pF capacitor connected between the
signal input and a global calibration voltage, buffered through a
10Ω resistor. This voltage controls the quantity of charge
injected, and can be set with 12-bit precision over a range of 0 to 5V
(AD5321). The LSB is thus ~1.22mV corresponding to a charge injection
resolution of ~12fC.
A set of 16 FETs driven by the FPGA control the point of injection,
each FET driving 4 non-adjacent channels. Switching the FET on pulls
the calibration line to ground. The firmware functionality exposes the
ability to control the magnitiude of the charge pulse (through the I2C
bus), the set of channels activated, as a 16-bit mask, and the time of
the charge injection relative to the start of the set of integration
cycles with a precision of 10ns and range of 16-bits.
Note that the index begins counting from the start of the
pipeline reset, a value of ~20 (~200ns) is required to place the pulse
at the start of the first integration cycle.
Channel Mappings
The mapping of the user controllable channel enable mask to the TripT
channels is shown in the following table. Please note that the channel
indices shown on the TFB silk screen start from 1, not 0.
| Enable Mask to Channel Map |
| Bit |
Channel List |
| 0 |
A0,A4,A8,A12 |
| 1 |
A1,A5,A9,A13 |
| 2 |
A2,A6,A10,A14 |
| 3 |
A3,A7,A11,A15 |
| 4 |
B0,B4,B8,B12 |
| 5 |
B1,B5,B9,B13 |
| 6 |
B2,B6,B10,B14 |
| 7 |
B3,B7,B11,B15 |
| 8 |
C0,C4,C8,C12 |
| 9 |
C1,C5,C9,C13 |
| 10 |
C2,C6,C10,C14 |
| 11 |
C3,C7,C11,C15 |
| 12 |
D0,D4,D8,D12 |
| 13 |
D1,D5,D9,D13 |
| 14 |
D2,D6,D10,D14 |
| 15 |
D3,D7,D11,D15 |