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Configuration Packet Description

The TFB has a configuration space that allows parameters to be written to and read from (volatile) registers in the device. The address and data widths are 16 bits. Serial interface packets carry configuration packets as their payload. In principle, single and block transfers are possible, though at present only single transfers are supported. The structure required for upstream packets is:

Upstream Configuration Commands (to TFB)
Index Name Notes
0 Address 15=read#/write bit (0=read, 1=write), 14:0 = address
1 Length Should always be 1.
2 Data Word Present only for Write commands, must be absent for reads.


Read and write commands may be packed together in the same payload and transmitted to the TFB in one transfer, the configuration bus master will process each one in turn until the input buffer is empty. Write requests invoke no response from the bus master; read requests will generate a downstream packet that has the following structure:

Downstream Configuration Returns (from TFB)
Index Name Notes
0 Address 15=read bit (0), 14:0 = address
1 Length Should always be 1.
2 Data Word The data from the register that was addressed.


These packets are dispatched to the packet formatting engine, which adds the necessary header, generates and appends the CRC and then forwards the packet through the output arbiter to the serialisation engine. Note that a distinct downstream packet will be generated for each read request sent to the configuration master. The configuration master has no knowledge of the settings for the generation of ACK packets, thus a read request will separately generate an ACK and the return packet.

Incorrect Addresses

As of firmware version 0.30, the configuration interface was made tolerant of incorrect (non-existent) packets. Prior to this, a reset was required in the event of an addressing error.