Trip-T Front End Board Documentation/Monitoring and I2C

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I2C Bus

The TFB has an I2C bus on board. There are several slave devices on the bus mounted on the TFB. These are designed to monitor the temperature and supply voltages. Additionally, the bus is routed to a 6-pin 0.1 inch header placed next to the power connector.
This provides the possibility of external devices being powered (3.3V only) and accessed through this route providing that no address clashes are introduced.

TFB I2C Address Allocation

The devices internal to the TFB are summarised here and must not be used by any external devices.

I2C Addresses internal to the TFB
Address	Device	Description
0xC	AD5321	Charge Injection DAC Voltage Level
0x21	AD7998	8 Channel ADC
0x48	LM92	Temperature Sensor

Monitor Player

Overview

Interacting with the I2C bus is quite transaction intensive. For this reason, the TFB firmware contains a polling circuit that will periodically execute a series of user programmable I2C transactions followed by a user specified period of inactivity. Once the period of inactivity has begun, the Monitor Player releases a single packet containing the complete record of I2C transactions and data to the arbiter for serialisation over the serial interface to the RMM. This will be interleaved with any other packets ready for serialisation in a non-prioritised fashion. The Pipe ID of these packets is 0xC, permitting them to be distinguished from physics data.

When activated, the Monitor Player assumes complete control of the I2C bus and no manual transactions (those mastered by the FPN) are possible. Once deactivated, the Monitor player will finish any pending I2C transaction and upon reaching the sleep period, will release the final data packet, relinquish control of the I2C bus, and return to an idle state. The instruction buffer is retained, and the the Monitor Player may be restarted without loading it.

Fault Tolerance

The Monitor Player will tolerate any failing I2C transactions or mistakes in the address specifications that lead to an I2C timeout condition. The I2C subsystem will be automatically reset, an error bit will be placed in the transaction record at the appropriate place, and the Monitor Player will move on to the next command in the sequence.

Sleep Duration

A 16 bit register specifies the top 16 bits of a 32 bit number. This makes the least significant bit :

LSB = 65536 * Tclk
LSB = 65536 * 50ns = 3.2768ms.

Since the Monitor Player is run off the internally generated 20MHz clock. All 16 bit values are valid, 0 being continuously operated, and 65535 introducing a pause of ~214.7 seconds.

Command Buffer

The command buffer is operated as a FIFO from the perspective of the user, and as a sequentially accessed ring buffer internally. It is 16 bits wide, and thus matches the width of the internal TFB data bus. The buffer depth is 1024 words deep, and may be filled to any level.

Command Formatting

Commands themselves comprise 1, 2 or 3 words, with the control bits in the first word dictating the type of command required. The bit fields are thus designated as follows:

bit 15	bits 14:10	bit 9	bit 8	bit 7	bits 6:0
1=Pause Command 0=standard command	No function, reserved.	1=Transfer slave internal address first 0=don't	1=Word transfer, 0=Byte transfer	1=read 0=write)	I2C Slave Address

A write command requires data, and this must follow the address/command word either directly, when bit 9=0, or following the slave internal address when bit 9 is set. A command, thus, can occupy 1 memory location, or up to 3. This means that the total number of commands possible is dependent on the type of commands loaded.

Note on 1-Wire Bridge behaviour

The I2C bus protocol defines the MSB to be transferred first, in contrast to the 1-wire protocol, where the LSB is transferred first. Additionally, the rate of the I2C bus (even at 100kHz) is higher than that of the 1-wire bus. For these reasons a pause command was added to the command protocol to provide a means of permitting the 1-wire transfer to finish a byte transfer before the next I2C transaction is executed by the monitor.
When the MSB of the command word is set, this designates the command to be a pause, and the least significant 14 bits represent the duration of the pause. These bits are shifted into a bit field 28:13. This means that the least significant bit represents a pause of ~0.82ms, and the maximum delay is ~26s.

Note that since a pause command does not generate an I2C transaction, no status word is added to the output buffer.

Software exists for formatting these commands in terms of the I2C addresses required, whether they are reads or writes, how many bytes to be transferred etc. Once finished, the buffer is accessible either directly or as a TFBPacketHandler.

MonitorCommander.hh
MonitorCommander.cc

The size of the output packet is also available since this is deterministic once the buffer contains all the desired commands.

Output Packet

A 2kByte FIFO is used to hold the results of the Monitor Player activity. Every transaction generates a 16 bit status word with the following structure.

bit 15	bit 14	bits 13:10	bits 9:0
Error Bit	1=Command was a read 0=Command was a write	set to 0	Command Buffer Address

When set, bit 15 indicates that an error occurred. Bit 14 indicates that the command was a read, and thus there will be data following. The command buffer address should be used to identify the source of the data.

Slave Behaviour

The majority of the slave devices are expected to be temperature sensors. When driving these devices, care must be taken to observe the conversion time required for the conversion to complete. Often this is of the order of 500ms, and as such, the Monitor would be capable of requesting data mid-conversion. The normal slave behaviour in these cases is halt the current conversion to allow the last conversion result to be read. If this process happens continuously it would be possible for the conversion in progress never to complete. It is advised, thus, that where relatively long conversion times are required, the data readout commands be placed at the start of the sequence, and conversion start command at the end of the sequence, followed by an appropriately long pause.