CALICE ECAL Readout Electronics Conceptual Design Review
Contains links, documents, talks, etc., for the CALICE-UK ECAL electronics CDR
- Organisation and agenda
(doc,
txt)
- Project specification
(ps,
pdf)
- External interfaces and requirements
- VFE-PCB
(ps,
pdf),
proposed connector
(pdf),
JST
web site
- Trigger inputs
(doc,
pdf)
- Data Acquisition
(ps,
pdf)
- System
- Overview
(eps)
- Internal interface: VME crate customisation
(doc)
- Proposed PCI/VME: SBS VMEbus-PCI
(Model 618)
- VME crates:
(Wiener)
- Trigger board
- Block diagram
(ppt,
pdf),
functional diagram
(ppt,
pdf),
description
(doc,
pdf)
- External interface: inputs (see above),
front panel layout
(ppt,
pdf)
- External interface: VME
(doc,
pdf)
- Readout board
- Overview
(ps,
pdf),
data paths
(pdf)
- External interface: VFE-PCB (see above),
front panel layout
(ppt,
pdf)
- External interface: VME
(pdf)
- Internal interface: master-to-slave FPGA configuration path timing
(pdf)
- Internal interface: slave-to-master FPGA data path
(ps,
pdf)
- Master FPGA: FPGA block diagram
(pdf),
pin estimate
(txt)
- Slave FPGA: FPGA block diagram, pin estimate and ADC control timing
(ps,
pdf),
missing Fig 1
(doc,
ps)
- Proposed FPGA's (Spartan-II)
- Proposed ADC
(AD7664),
DAC
(AD5543)
- Test board
- Block diagram
(ps),
functional diagram
(ppt,
pdf)
- External interface: VFE-PCB (see above),
front panel layout
(ppt,
pdf)
- External interface: VME (see above)
- Talks
- Overview - Paul Dauncey
(ppt)
- Trigger board - Matt Warren
(ppt)
- Readout board, part 1 - Dave Mercer
(ppt)
- Readout board, part 2 - Dave Price
(ppt,
jpg slides
1,
2,
3,
4,
5,
6,
7,
8)
- Summary and issues - Paul Dauncey
(ppt)
- Report
- Report
(ps,
pdf)
- Links mentioned in report: bus LVDS
(pdf),
digital delay unit
(DS1020),
dual-ADC package
(ADS8361)
- File access
Go to the CALICE-UK home page
